PICs@ICFO Strategic Initiative: Junior Research Engineer position in PIC Design and Simulation

As part of the PICs@ICFO Strategic Initiative, ICFO coordinates PIXEurope, a flagship Pilot Line funded under the European Chips JU program focused on Advanced Photonic Integrated Circuits (PICs) through which ICFO is advancing frontier technologies, including optical interposers for Co-packaged optics for next-generation optoelectronic and photonic devices.

To strengthen this initiative, ICFO is seeking junior researcher or engineer with experience in the design and numerical simulation of integrated photonic devices and circuits. The candidate should have a solid background in photonics and electromagnetic theory and be motivated to develop practical PIC designs targeting fabrication and experimental validation.

Position Overview:

We are offering a Junior Research Engineer position in Photonic Integrated Circuit (PIC) design and simulation to a well-qualified, highly motivated and dynamic young scientist or engineer who wishes to develop their career in integrated photonics in a friendly and stimulating research and technology environment.

The successful candidate will join the Optoelectronics research group at ICFO, led by Prof. Dr. Valerio Pruneri, and will contribute to the development of advanced photonic integrated circuits within the group’s research and technology-development activities.

The selected candidate will work closely with senior PIC designers, experimental researchers, fabrication partners, and other technical teams. The position is primarily design- and simulation-oriented, providing an opportunity to develop expertise across the complete PIC design workflow, from device modelling and optimization to circuit layout and preparation for fabrication.

Key Responsibilities:

• Design and simulate integrated photonic devices and circuits,
• Perform electromagnetic and optical simulations using numerical methods such as FDTD, FEM, eigenmode expansion, and mode solving.
• Optimize photonic-device performance considering insertion loss, coupling efficiency, bandwidth, modal properties, fabrication tolerances, and footprint.
• Develop photonic circuits by combining individual building blocks and perform circuit-level simulations where required.
• Prepare PIC layouts for fabrication, following design rules and available process-design-kit (PDK) specifications.
• Collaborate with fabrication partners and internal teams during design reviews, tape-out preparation, and design-for-manufacturing activities.
• Analyse experimental characterization results and compare them with simulations to support device debugging and iterative design improvement.
• Develop scripts and simulation workflows for design automation, parameter optimization, and data analysis. Document design methodologies, simulation results, and device performance in structured technical reports.

This position will report to the Prof. Dr. Valerio Pruneri, Director of the European Chips JU Pilot Line PIXEurope.

PIXEurope is co-funded by the Chips Joint Undertaking and national funding authorities of the Participating States, Spain, Ireland, The Netherlands, Finland, Belgium, Portugal, Poland, Austria, France, Italy, United Kingdom. In particular, it is co-funded by Spain through the Ministry for Digital Transformation and Civil Service under reference CJU-010000-2025-0005, as part of the Recovery, Transformation and Resilience Plan (PRTR).

Applicants must hold an internationally recognized engineering or science degree (BSc, MSc, or recently completed PhD) in Photonics, Electrical Engineering, Physics, Telecommunications Engineering, or a related field.

We are looking for candidates with demonstrated experience in one or more of the following areas:

• Design and numerical simulation of integrated photonic devices.
• Electromagnetic simulation tools such as Ansys/Lumerical, COMSOL Multiphysics, CST, RSoft, or equivalent.
• Optical waveguide theory, including guided modes, coupling, interference, dispersion, and propagation loss.
• PIC components such as waveguides, couplers, interferometers, resonators, grating couplers, or mode converters.
• PIC layout and mask design, preferably using tools such as KLayout, IPKISS, GDSfactory, Nazca, or equivalent.
• Familiarity with GDSII layouts, fabrication design rules, and photonic PDKs.
• Programming and data analysis using Python, MATLAB, or similar tools. Numerical optimization and automated simulation workflows.

Previous experience with one or more integrated-photonics platforms such as silicon photonics, silicon nitride, thin-film lithium niobate, III-V, AlN, or other dielectric photonic platforms will be considered an advantage.

Experience with experimental characterization of photonic devices is desirable but not required, as the main focus of the position will be PIC design and simulation.

The ideal candidate is curious, detail-oriented, proactive, and motivated to learn, with the ability to work effectively within a multidisciplinary team connecting photonic design, fabrication, and experimental validation.

What We Offer

• Fixed-term contract linked to NextGeneration funds (406)
• Access to ICFO’s advanced photonics research and technical environment, with support from experienced personnel in PIC design, simulation, fabrication, and optical characterization.
• Opportunity to develop practical experience across the complete PIC development cycle, from device concept and simulation to layout, fabrication, and experimental validation.
• Training and hands-on experience with advanced simulation tools, design methodologies, and photonic fabrication platforms.
• Opportunity to collaborate with academic, industrial, and technology-development partners in integrated photonics. A family allowance may be granted to candidates with dependents, according to ICFO policies.

Equal Opportunity

ICFO is an equal opportunity employer. We hire based solely on merit and potential, regardless of gender, nationality, or disability. ICFO fully endorses the European Charter for Researchers and Code of Conduct for the Recruitment of Researchers, ensuring a transparent and supportive recruitment process.

To apply, please submit your:

• resume,
• a cover letter outlining your experience, contact information for 2 professional references.

Applications should be submitted via the ICFOjobs platform http://jobs.icfo.eu. The selection process is conducted in accordance with ICFO’s Open, Transparent and Merit-based Recruitment (OTM-R) Policy, ensuring equal opportunities, transparency, and fair treatment for all applicants. Candidates are assessed exclusively on the basis of their qualifications, experience, skills, achievements, and potential in relation to the requirements of the position. Further information on the recruitment principles and procedures, conflict of interest and the appeals mechanism available to candidates, can be found in the OTM-R Policy.

The selection process will consist of:

1. Eligibility check of applications

2. Assessment of merits (education, experience, and language)

3. Interview with shortlisted candidates

The Evaluation Committee will include at least three members and ensure gender balance and impartiality.

Each phase will be documented, and candidates will be notified of the outcome within 15 days of the interview.

For formal enquiries regarding the application process, please contact: jobs@icfo.eu

For project and technology enquiries, please contact: valerio.pruneri@icfo.eu

For more information about ICFO, visit: https://www.icfo.eu.

Data Protection

In accordance with Regulation (EU) 2016/679 (GDPR) and Organic Law 3/2018, ICFO informs applicants that their personal data will be processed exclusively for recruitment purposes.

• Controller: Fundació ICFO – Institut de Ciències Fotòniques, Av. Carl Friedrich Gauss 3, 08860 Castelldefels (Barcelona).
• DPO: dpo@icfo.eu
• Legal basis: performance of a task in the public interest.
• Rights: access, rectification, erasure, restriction, and opposition.
• Supervisory authority: Catalan Data Protection Authority (APDCAT) https://apdcat.gencat.cat.

All recruitment files will be retained in accordance with the Catalan public-sector archival retention schedule (DOGC 2117).

Reference: 1151

Application deadline: 20/10/2026

20th of October, 2026